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DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 2 months ago
Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits
Nanometer circuits are becoming increasingly susceptible to soft-errors due to alpha-particle and atmospheric neutron strikes as device scaling reduces node capacitances and suppl...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
ICASSP
2011
IEEE
13 years 19 days ago
Applications of short space-time fourier analysis in digital acoustics
This paper presents a signal processing tool for analyzing and manipulating digitized acoustic wave fields, based on a spatio-temporal extension of the time–frequency represent...
Francisco Pinto, Martin Vetterli
GECCO
2007
Springer
300views Optimization» more  GECCO 2007»
14 years 3 months ago
A NSGA-II, web-enabled, parallel optimization framework for NLP and MINLP
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
David J. Powell, Joel K. Hollingsworth
CP
2009
Springer
14 years 9 months ago
Solving a Location-Allocation Problem with Logic-Based Benders' Decomposition
Abstract. We address a location-allocation problem that requires deciding the location of a set of facilities, the allocation of customers to those facilities under facility capaci...
Mohammad M. Fazel-Zarandi, J. Christopher Beck
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
14 years 2 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...