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ICS
2004
Tsinghua U.
14 years 3 months ago
Applications of storage mapping optimization to register promotion
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
Patrick Carribault, Albert Cohen
ICS
2001
Tsinghua U.
14 years 2 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
IEEEPACT
1998
IEEE
14 years 1 months ago
Static Methods in Hybrid Branch Prediction
Hybrid branch predictors combine the predictions of multiple single-level or two-level branch predictors. The prediction-combining hardware -- the "meta-predictor" -may ...
Dirk Grunwald, Donald C. Lindsay, Benjamin G. Zorn
CAV
2010
Springer
194views Hardware» more  CAV 2010»
14 years 1 months ago
LTSmin: Distributed and Symbolic Reachability
ions of ODE models (MAPLE, GNA). On the algorithmic side (Sec. 3.2), it supports two main streams in high-performance model checking: reachability analysis based on BDDs (symbolic)...
Stefan Blom, Jaco van de Pol, Michael Weber
USENIX
2004
13 years 11 months ago
Making the "Box" Transparent: System Call Performance as a First-Class Result
For operating system intensive applications, the ability of designers to understand system call performance behavior is essential to achieving high performance. Conventional perfo...
Yaoping Ruan, Vivek S. Pai