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ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
14 years 3 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
ISPASS
2005
IEEE
14 years 3 months ago
Balancing Performance and Reliability in the Memory Hierarchy
Cosmic-ray induced soft errors in cache memories are becoming a major threat to the reliability of microprocessor-based systems. In this paper, we present a new method to accurate...
Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Ta...
SC
2005
ACM
14 years 3 months ago
Making Sequential Consistency Practical in Titanium
The memory consistency model in parallel programming controls the order in which operations performed by one thread may be observed by another. Language designers have been reluct...
Amir Kamil, Jimmy Su, Katherine A. Yelick
SIGIR
2005
ACM
14 years 3 months ago
A phonotactic-semantic paradigm for automatic spoken document classification
We demonstrate a phonotactic-semantic paradigm for spoken document categorization. In this framework, we define a set of acoustic words instead of lexical words to represent acous...
Bin Ma, Haizhou Li
AAIM
2005
Springer
110views Algorithms» more  AAIM 2005»
14 years 3 months ago
Dynamically Updating the Exploiting Parameter in Improving Performance of Ant-Based Algorithms
Abstract. The utilization of pseudo-random proportional rule to balance between the exploitation and exploration of the search process was shown in Ant Colony System (ACS) algorith...
Hoang Trung Dinh, Abdullah Al Mamun, Hieu T. Dinh