1242 search results - page 44 / 249 » Benchmark Analysis with FaCT |
IEEEPACT
2000
IEEE
14 years 14 hour ago
2000
IEEE
Region-based compilation repartitions a program into more desirable compilation units for optimization and scheduling, particularly beneficial for ILP architectures. With region-...
ICASSP
2009
IEEE
13 years 5 months ago
2009
IEEE
An analysis of quaternion-valued intrinsic mode functions (IMFs) within three dimensional empirical mode decomposition is presented. This is achieved by using the delay vector var...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— Many source separation algorithms fail to deliver robust performance in presence of artifacts introduced by cross-channel redundancy, non-homogeneous mixing and highdimensional...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we highlight a fast, effective and practical statistical approach that deals with inter and intra-die variations in VLSI chips. Our methodology is applied to a numb...