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» Benchmarking and hardware implementation of JPEG-LS
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DATE
1997
IEEE
99views Hardware» more  DATE 1997»
14 years 1 months ago
Fast controllers for data dominated applications
A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
Andre Hertwig, Hans-Joachim Wunderlich
ISMVL
1997
IEEE
134views Hardware» more  ISMVL 1997»
14 years 1 months ago
Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams
In this paper, the minimization of incompletely specified multi-valued functions using functional decomposition is discussed. From the aspect of machine learning, learning sample...
Craig M. Files, Rolf Drechsler, Marek A. Perkowski
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
14 years 1 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
14 years 1 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli
ICCD
1997
IEEE
90views Hardware» more  ICCD 1997»
14 years 1 months ago
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Ta...