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SBACPAD
2004
IEEE
105views Hardware» more  SBACPAD 2004»
13 years 9 months ago
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes br...
Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale ...
ETS
2010
IEEE
174views Hardware» more  ETS 2010»
13 years 8 months ago
Test-architecture optimization for TSV-based 3D stacked ICs
Testing of 3D stacked ICs (SICs) is becoming increasingly important in the semiconductor industry. In this paper, we address the problem of test architecture optimization for 3D s...
Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakr...
JCP
2008
97views more  JCP 2008»
13 years 7 months ago
Profiling Tools for FPGA-Based Embedded Systems: Survey and Quantitative Comparison
Profiling tools are computer-aided design (CAD) tools that help in determining the computationally intensive portions in software. Embedded systems consist of hardware and software...
Jason G. Tong, Mohammed A. S. Khalid
SIGMETRICS
1998
ACM
13 years 7 months ago
Scheduling with Implicit Information in Distributed Systems
Implicitcoscheduling is a distributed algorithm fortime-sharing communicating processes in a cluster of workstations. By observing and reacting to implicit information, local sche...
Andrea C. Arpaci-Dusseau, David E. Culler, Alan M....
ACSD
2010
IEEE
239views Hardware» more  ACSD 2010»
13 years 5 months ago
A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...
W. B. Toms, David A. Edwards