Sciweavers

158 search results - page 19 / 32
» Benefits of Processor Clustering in Designing Large Parallel...
Sort
View
DEBS
2008
ACM
13 years 10 months ago
Speculative out-of-order event processing with software transaction memory
In event stream applications, events flow through a network of components that perform various types of operations, e.g., filtering, aggregation, transformation. When the operatio...
Andrey Brito, Christof Fetzer, Heiko Sturzrehm, Pa...
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
CCGRID
2009
IEEE
14 years 3 months ago
Scheduling Strategies for Cycle Scavenging in Multicluster Grid Systems
The use of today’s multicluster grids exhibits periods of submission bursts with periods of normal use and even of idleness. To avoid resource contention, many users employ obse...
Omer Ozan Sonmez, Bart Grundeken, Hashim H. Mohame...
SP
1999
IEEE
125views Security Privacy» more  SP 1999»
14 years 1 months ago
A Multi-Threading Architecture for Multilevel Secure Transaction Processing
A TCB and security kernel architecture for supporting multi-threaded, queue-driven transaction processing applications in a multilevel secure environment is presented. Our design ...
Haruna R. Isa, William R. Shockley, Cynthia E. Irv...
PACS
2000
Springer
83views Hardware» more  PACS 2000»
14 years 11 days ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald