142 search results - page 4 / 29 » Better than a petaflop: The power of efficient experimental ... |
ISPAN
2000
IEEE
13 years 12 months ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
EUROGP
2001
Springer
14 years 1 days ago
2001
Springer
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
TSP
2008
13 years 7 months ago
2008
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...