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ICC
2007
IEEE
135views Communications» more  ICC 2007»
14 years 1 months ago
Two-Dimensional Generalized Partial Response Equalizer for Bit-Patterned Media
The use of bit-patterned media is one of the approaches being investigated to extend magnetic recording densities to 1 Tbit/in2 and beyond. In patterned media, track pitch may be s...
Sheida Nabavi, B. V. K. Vijaya Kumar
GRAPHITE
2005
ACM
14 years 1 months ago
Sketching with a low-latency electronic ink drawing tablet
Drawing on paper is an experience which is still unmatched by any input device for drawing into a computer in terms of accuracy, dexterity and general pleasantness of use. This pa...
Alex Henzen, Neculai Ailenei, Fabian Di Fiore, Fra...
CCS
2004
ACM
14 years 27 days ago
Privacy and security in library RFID: issues, practices, and architectures
We expose privacy issues related to Radio Frequency Identification (RFID) in libraries, describe current deployments, and suggest novel architectures for library RFID. Libraries ...
David Molnar, David Wagner
EUROCRYPT
2010
Springer
14 years 9 days ago
Encryption Schemes Secure against Chosen-Ciphertext Selective Opening Attacks
Imagine many small devices send data to a single receiver, encrypted using the receiver’s public key. Assume an adversary that has the power to adaptively corrupt a subset of the...
Serge Fehr, Dennis Hofheinz, Eike Kiltz, Hoeteck W...
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
13 years 11 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus