7 search results - page 1 / 2 » Bit matrix multiplication in commodity processors |
ASAP
2008
IEEE
14 years 1 months ago
2008
IEEE
Registers in processors generally contain words or, with the addition of multimedia extensions, short vectors of subwords of bytes or 16-bit elements. In this paper, we view the c...
ISPDC
2010
IEEE
13 years 5 months ago
2010
IEEE
—With systems such as Road Runner, there is a trend in super computing to offload parallel tasks to special purpose co-processors, composed of many relatively simple scalar proc...
ICPP
1993
IEEE
13 years 11 months ago
1993
IEEE
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
ACMMSP
2006
ACM
14 years 1 months ago
2006
ACM
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
ISCAS
2005
IEEE
14 years 21 days ago
2005
IEEE
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...