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TCSV
2002
89views more  TCSV 2002»
13 years 6 months ago
Reducing energy dissipation of frame memory by adaptive bit-width compression
Abstract--In this paper, we propose a new architectural technique to reduce energy dissipation of frame memory through adaptive bitwith compression. Unlike related approaches, the ...
Vasily G. Moshnyaga
ISQED
2011
IEEE
329views Hardware» more  ISQED 2011»
12 years 10 months ago
New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm
The extent to which the 6T SRAM bit cell can be perpetuated through continued scaling is of enormous technological and economic importance. Understanding the growing limitations i...
Randy W. Mann, Benton H. Calhoun
CODES
2009
IEEE
13 years 10 months ago
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses
Microcoded customized IPs offer superior performance and direct programmability of micro-architectural structures compared to instruction-based processors, yet at the cost of dra...
Chengmo Yang, Mingjing Chen, Alex Orailoglu
ICIP
2002
IEEE
14 years 8 months ago
Data rate smoothing in interactive walkthrough applications using 2D prefetching
Compared to a geometric approach, image based rendering applied to 3D view reconstruction doesn't require 3D model construction and doesn't depend on the complexity of t...
Vitali Zagorodnov, Peter J. Ramadge
APCCAS
2006
IEEE
206views Hardware» more  APCCAS 2006»
14 years 24 days ago
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory
—A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bi...
Po-Tsang Huang, Wei-Keng Chang, Wei Hwang