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MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 9 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
CASES
2010
ACM
13 years 8 months ago
Implementing virtual secure circuit using a custom-instruction approach
Although cryptographic algorithms are designed to resist at least thousands of years of cryptoanalysis, implementing them with either software or hardware usually leaks additional...
Zhimin Chen, Ambuj Sinha, Patrick Schaumont
SIGSOFT
2010
ACM
13 years 8 months ago
Scalable SMT-based verification of GPU kernel functions
Interest in Graphical Processing Units (GPUs) is skyrocketing due to their potential to yield spectacular performance on many important computing applications. Unfortunately, writ...
Guodong Li, Ganesh Gopalakrishnan
ICCAD
2009
IEEE
131views Hardware» more  ICCAD 2009»
13 years 8 months ago
Scheduling with soft constraints
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Jason Cong, Bin Liu, Zhiru Zhang
ICALP
2011
Springer
13 years 2 months ago
New Algorithms for Learning in Presence of Errors
We give new algorithms for a variety of randomly-generated instances of computational problems using a linearization technique that reduces to solving a system of linear equations...
Sanjeev Arora, Rong Ge