613 search results - page 26 / 123 » Block cache for embedded systems |
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
DM
2008
13 years 8 months ago
2008
The present paper continues the study (begun by Quattrocchi, Colouring 4-cycle systems with specified block colour pattern: the case of embedding P3-designs, Electron. J. Combin.,...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
RTCSA
2008
IEEE
14 years 3 months ago
2008
IEEE
RTCSA
1999
IEEE
14 years 28 days ago
1999
IEEE
A non-blocking protocol that allows real-time tasks to share data in a multiprocessor system is presented in this paper. The protocol gives the means to concurrent real-time tasks...