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ASPDAC
2006
ACM
126views Hardware» more  ASPDAC 2006»
14 years 2 months ago
A novel instruction scratchpad memory optimization method based on concomitance metric
Scratchpad memory has been introduced as a replacement for cache memory as it improves the performance of certain embedded systems. Additionally, it has also been demonstrated tha...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...
LCTRTS
2000
Springer
14 years 5 days ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra
HIPEAC
2010
Springer
13 years 6 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...
ECRTS
2010
IEEE
13 years 9 months ago
Precise and Efficient FIFO-Replacement Analysis Based on Static Phase Detection
Schedulability analysis for hard real-time systems requires bounds on the execution times of its tasks. To obtain useful bounds in the presence of caches, static timing analyses mu...
Daniel Grund, Jan Reineke
DAC
1999
ACM
14 years 9 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti