613 search results - page 66 / 123 » Block cache for embedded systems |
DSN
2011
IEEE
12 years 7 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access will result in a definite cache hit or miss. This unpredictabilit...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
ICDCS
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper evaluates the use of per-node multi-threading to hide remote memory and synchronization latencies in a software DSM. As with hardware systems, multi-threading in softwa...