The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
Robert Stets, Sandhya Dwarkadas, Nikos Hardavellas...
Background: Genes interact with each other as basic building blocks of life, forming a complicated network. The relationship between groups of genes with different functions can b...
Jong-Min Kim, Yoon-Sung Jung, Engin A. Sungur, Kap...
Electrical-to-optical domain conversions and vice versa (denoted by O/E/O conversions) for each hop in optical core transport networks impose considerable capital and financial ov...
Amin R. Mazloom, Preetam Ghosh, Kalyan Basu, Sajal...
Efficient multicast congestion control (MCC) is one of the critical components required to enable the IP multicast deployment over the Internet. Previously proposed MCC schemes ca...
Jiang Li, Murat Yuksel, Xingzhe Fan, Shivkumar Kal...