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ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 5 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
ICALP
2005
Springer
14 years 1 months ago
Time-Space Lower Bounds for the Polynomial-Time Hierarchy on Randomized Machines
We establish the first polynomial-strength time-space lower bounds for problems in the lineartime hierarchy on randomized machines with two-sided error. We show that for any inte...
Scott Diehl, Dieter van Melkebeek
STOC
1993
ACM
141views Algorithms» more  STOC 1993»
14 years 6 days ago
Bounds for the computational power and learning complexity of analog neural nets
Abstract. It is shown that high-order feedforward neural nets of constant depth with piecewisepolynomial activation functions and arbitrary real weights can be simulated for Boolea...
Wolfgang Maass
CORR
2004
Springer
137views Education» more  CORR 2004»
13 years 8 months ago
Implementation of Logical Functions in the Game of Life
: The Game of Life cellular automaton is a classical example of a massively parallel collision-based computing device. The automaton exhibits mobile patterns, gliders, and generato...
Jean-Philippe Rennard
SIGIR
2012
ACM
11 years 10 months ago
Automatic term mismatch diagnosis for selective query expansion
People are seldom aware that their search queries frequently mismatch a majority of the relevant documents. This may not be a big problem for topics with a large and diverse set o...
Le Zhao, Jamie Callan