Sciweavers

141 search results - page 10 / 29
» Boolean Function Representation Using Parallel-Access Diagra...
Sort
View
VLSI
2007
Springer
14 years 25 days ago
Use of gray decoding for implementation of symmetric functions
— This paper discusses reduction of the number of product terms in representation of totally symmetric Boolean functions by Sum of Products (SOP) and Fixed Polarity ReedMuller (F...
Osnat Keren, Ilya Levin, Radomir S. Stankovic
ICDAR
2011
IEEE
12 years 6 months ago
Tuning between Exponential Functions and Zones for Membership Functions Selection in Voronoi-Based Zoning for Handwritten Charac
— In Handwritten Character Recognition, zoning is rigtly considered as one of the most effective feature extraction techniques. In the past, many zoning methods have been propose...
Sebastiano Impedovo, Giuseppe Pirlo
TCAD
2002
121views more  TCAD 2002»
13 years 6 months ago
Robust Boolean reasoning for equivalence checking and functional property verification
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, ...
IACR
2011
104views more  IACR 2011»
12 years 6 months ago
Secure Multi-Party Computation of Boolean Circuits with Applications to Privacy in On-Line Marketplaces
Protocols for generic secure multi-party computation (MPC) come in two forms: they either represent the function being computed as a boolean circuit, or as an arithmetic circuit o...
Seung Geol Choi, Kyung-Wook Hwang, Jonathan Katz, ...
ICCD
2001
IEEE
176views Hardware» more  ICCD 2001»
14 years 3 months ago
BDD Variable Ordering by Scatter Search
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
William N. N. Hung, Xiaoyu Song