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» Boosting Set Constraint Propagation for Network Design
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TODAES
2002
134views more  TODAES 2002»
13 years 7 months ago
False-noise analysis using logic implications
ct Cross-coupled noise analysis has become a critical concern in today's VLSI designs. Typically, noise analysis makes an assumption that all aggressing nets can simultaneousl...
Alexey Glebov, Sergey Gavrilov, David Blaauw, Vlad...
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
13 years 11 months ago
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Santiago González Pestana, Edwin Rijpkema, ...
CSCLP
2007
Springer
14 years 1 months ago
Combining Two Structured Domains for Modeling Various Graph Matching Problems
Abstract. Graph pattern matching is a central application in many fields. In various areas, the structure of the pattern can only be approximated and exact matching is then too ac...
Yves Deville, Grégoire Dooms, Stépha...
DSN
2007
IEEE
14 years 2 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
CP
2007
Springer
14 years 1 months ago
Tradeoffs in the Complexity of Backdoor Detection
Abstract There has been considerable interest in the identification of structural properties of combinatorial problems that lead to efficient algorithms for solving them. Some of...
Bistra N. Dilkina, Carla P. Gomes, Ashish Sabharwa...