406 search results - page 11 / 82 » Boosting Using Branching Programs |
ASPLOS
1992
ACM
13 years 11 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
PCI
2005
Springer
14 years 26 days ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
FPL
2003
Springer
14 years 18 days ago
2003
Springer
Abstract. This paper explores using information about program branch probabilities to optimise reconfigurable designs. The basic premise is to promote utilization by dedicating mo...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...