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IISWC
2008
IEEE
14 years 4 months ago
Energy-aware application scheduling on a heterogeneous multi-core system
Heterogeneous multi-core processors are attractive for power efficient computing because of their ability to meet varied resource requirements of diverse applications in a workloa...
Jian Chen, Lizy Kurian John
ICPP
2002
IEEE
14 years 2 months ago
Out-of-Order Instruction Fetch Using Multiple Sequencers
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
Paramjit S. Oberoi, Gurindar S. Sohi
CP
2009
Springer
14 years 10 months ago
Filtering Numerical CSPs Using Well-Constrained Subsystems
When interval methods handle systems of equations over the reals, two main types of filtering/contraction algorithms are used to reduce the search space. When the system is well-co...
Ignacio Araya, Gilles Trombettoni, Bertrand Neveu
JMLR
2010
149views more  JMLR 2010»
13 years 4 months ago
Learning Bayesian Network Structure using LP Relaxations
We propose to solve the combinatorial problem of finding the highest scoring Bayesian network structure from data. This structure learning problem can be viewed as an inference pr...
Tommi Jaakkola, David Sontag, Amir Globerson, Mari...
ISCA
1998
IEEE
124views Hardware» more  ISCA 1998»
14 years 2 months ago
Threaded Multiple Path Execution
This paper presents Threaded Multi-Path Execution (TME), which exploits existing hardware on a Simultaneous Multithreading (SMT) processor to speculatively execute multiple paths ...
Steven Wallace, Brad Calder, Dean M. Tullsen