23 search results - page 4 / 5 » Bounding Worst-Case Instruction Cache Performance |
DATE
2011
IEEE
12 years 11 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
As mobile phones become increasingly multifunctional, the number and size of applications installed in phones are rapidly increasing. Consequently, mobile phones require more hard...
PODC
2010
ACM
13 years 11 months ago
2010
ACM
We study Reader-Writer Exclusion [1], a well-known variant of the Mutual Exclusion problem [2] where processes are divided into two classes–readers and writers–and multiple re...
RTSS
2009
IEEE
14 years 2 months ago
2009
IEEE
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
PDCN
2004
13 years 9 months ago
2004
We present a family of methods for speeding up distributed locks by exploiting the uneven distribution of both temporal and spatial locality of access behaviour of many applicatio...