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ISCA
1997
IEEE
78views Hardware» more  ISCA 1997»
13 years 11 months ago
Trading Conflict and Capacity Aliasing in Conditional Branch Predictors
As modern microprocessors employ deeper pipelines and issue multiple instructions per cycle, they are becoming increasingly dependent on accurate branch prediction. Because hardwa...
Pierre Michaud, André Seznec, Richard Uhlig
MICRO
1994
IEEE
118views Hardware» more  MICRO 1994»
13 years 11 months ago
Characterizing the impact of predicated execution on branch prediction
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
Scott A. Mahlke, Richard E. Hank, Roger A. Bringma...
ISCA
1997
IEEE
98views Hardware» more  ISCA 1997»
13 years 11 months ago
Target Prediction for Indirect Jumps
As the issue rate and pipeline depth of high performance superscalar processors increase, the amount of speculative work issued also increases. Because speculative work must be th...
Po-Yung Chang, Eric Hao, Yale N. Patt
APCSAC
2006
IEEE
14 years 1 months ago
Using Branch Prediction Information for Near-Optimal I-Cache Leakage
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
Sung Woo Chung, Kevin Skadron
MAM
2007
90views more  MAM 2007»
13 years 7 months ago
Clustered indexing for branch predictors
ct 8 As a result of resource limitations, state in branch predictors is frequently shared between uncorrelated branches. This interference 9 can significantly limit prediction acc...
Veerle Desmet, Hans Vandierendonck, Koen De Bossch...