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MICRO
2000
IEEE
84views Hardware» more  MICRO 2000»
13 years 12 months ago
The impact of delay on the design of branch predictors
Modern microprocessors employ increasingly complicated branch predictors to achieve instruction fetch bandwidth that is sufficient for wide out-of-order execution cores. While ex...
Daniel A. Jiménez, Stephen W. Keckler, Calv...
JILP
2000
90views more  JILP 2000»
13 years 7 months ago
Speculative Updates of Local and Global Branch History: A Quantitative Analysis
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottlen...
Kevin Skadron, Margaret Martonosi, Douglas W. Clar...
IPPS
2005
IEEE
14 years 1 months ago
Control-Flow Independence Reuse via Dynamic Vectorization
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
Alex Pajuelo, Antonio González, Mateo Valer...
EUROPAR
1999
Springer
13 years 12 months ago
Multi-stage Cascaded Prediction
Two-level predictors deliver highly accurate conditional branch prediction, indirect branch target prediction and value prediction. Accurate prediction enables speculative executio...
Karel Driesen, Urs Hölzle
EXPCS
2007
13 years 11 months ago
Introducing entropies for representing program behavior and branch predictor performance
Predictors are inherent components of state-of-the-art microprocessors. Branch predictors are discussed actively from diverse perspectives. Performance of a branch predictor large...
Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba