1031 search results - page 53 / 207 » Broadcasting with Selective Reduction |
FPGA
2009
ACM
14 years 2 months ago
2009
ACM
Clock network power in field-programmable gate arrays (FPGAs) is considered and two complementary approaches for clock power reduction in the Xilinx R VirtexTM -5 FPGA are presen...
ATS
2005
IEEE
14 years 1 months ago
2005
IEEE
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
CONCUR
2008
Springer
13 years 9 months ago
2008
Springer
We present an algorithm for partial order reduction in the context of a countable universe of deterministic actions, of which finitely many are enabled at any given state. This mea...
SIP
2007
13 years 9 months ago
2007
— The goal of multi-frame image super-resolution is to use information from low-resolution images to construct highresolution images. Current multi-frame image super-resolution m...
IS
2006
13 years 7 months ago
2006
With rapidly decreasing storage costs, temporal document databases are now a viable solution in many contexts. However, storing an ever-growing database can still be too costly, a...