60 search results - page 9 / 12 » Bulk Synchronous Parallel Algorithms for the External Memory... |
ALGORITHMICA
2005
13 years 7 months ago
2005
An optimal prefetching and I/O scheduling algorithm L-OPT, for parallel I/O systems, using a read-once model of block references is presented. The algorithm uses knowledge of the n...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
POPL
2006
ACM
14 years 7 months ago
2006
ACM
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
–Architectures with multiple programmable cores are becoming more attractive for video codec applications because they can provide highly concurrent computation and support multi...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...