393 search results - page 37 / 79 » C Compiler Design for an Industrial Network Processor |
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
IPPS
2008
IEEE
14 years 2 months ago
2008
IEEE
Suitability of the next generation of high-performance computing systems for petascale simulations will depend on a balance between factors such as processor performance, memory p...
CORR
2007
Springer
13 years 8 months ago
2007
Springer
Min, Veeravalli, and Barlas have proposed strategies to minimize the overall execution time of one or several divisible loads on a heterogeneous linear network, using one or more ...
DAC
2009
ACM
14 years 9 months ago
2009
ACM
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
IMC
2004
ACM
14 years 1 months ago
2004
ACM
The capacity of today's network links, along with the heterogeneity of their traffic, is rapidly growing, more than the workstation’s processing power. This makes the task ...