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» C Compiler Design for an Industrial Network Processor
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FPL
2009
Springer
161views Hardware» more  FPL 2009»
14 years 1 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
SIGCOMM
2009
ACM
14 years 2 months ago
A programmable, generic forwarding element approach for dynamic network functionality
Communication networks are growing exponentially, and new services and applications are being introduced unceasingly. To meet the demands of these services and applications, curre...
Ran Giladi, Niv Yemini
IPSN
2007
Springer
14 years 2 months ago
A compact, high-speed, wearable sensor network for biomotion capture and interactive media
In this paper, we present a wireless sensor platform designed for processing multipoint human motion with low latency and high resolution. One application considered here is inter...
Ryan Aylward, Joseph A. Paradiso
CLUSTER
2001
IEEE
14 years 2 days ago
SOVIA: A User-level Sockets Layer Over Virtual Interface Architecture
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
Jin-Soo Kim, Kangho Kim, Sung-In Jung
CODES
2007
IEEE
14 years 2 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...