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172
Voted
CODES
2004
IEEE
15 years 7 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
151
Voted
SPAA
2000
ACM
15 years 7 months ago
2000
ACM
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
106
Voted
BCSHCI
2007
15 years 5 months ago
2007
This paper describes an empirical study on typing errors made by children during a text copy exercise. The literature on text input errors is first examined, focussing on studies ...
136
Voted
COLING
2008
15 years 5 months ago
2008
One style of Multi-Engine Machine Translation architecture involves choosing the best of a set of outputs from different systems. Choosing the best translation from an arbitrary s...
140
Voted
LANMR
2007
15 years 5 months ago
2007
Abstract We introduce some differences in the style defeasible information is represented and inferences are made in nonmonotonic reasoning. These, at first sight harmless, chang...