As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent...
Antonio Pullini, Federico Angiolini, Paolo Meloni,...
Region concept helps to accommodate cores larger than the tile size in mesh topology NoC architectures. In addition, it offers many new opportunities for NoC design, as well as pr...
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
Pascal T. Wolkotte, Gerard J. M. Smit, Jens E. Bec...
We describe the current status of and provide performance results for a prototype compiler of Prolog to C, ciaocc. ciaocc is novel in that it is designed to accept different kinds...
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...