Sciweavers

869 search results - page 116 / 174
» Cache Architectures for Reconfigurable Hardware
Sort
View
MSS
2005
IEEE
106views Hardware» more  MSS 2005»
14 years 1 months ago
An Architecture for Lifecycle Management in Very Large File Systems
We present a policy-based architecture STEPS for lifecycle management (LCM) in a mass scale distributed file system. The STEPS architecture is designed in the context of IBM’s ...
Akshat Verma, David Pease, Upendra Sharma, Marc Ka...
IPPS
2003
IEEE
14 years 28 days ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. Intel...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...
ERSA
2006
186views Hardware» more  ERSA 2006»
13 years 9 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
CODES
2003
IEEE
14 years 28 days ago
A low-cost memory architecture with NAND XIP for mobile embedded systems
NAND flash memory has become an indispensable component in mobile embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cost and ...
Chanik Park, Jaeyu Seo, Sunghwan Bae, Hyojun Kim, ...
CODES
2008
IEEE
14 years 2 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov