869 search results - page 128 / 174 » Cache Architectures for Reconfigurable Hardware |
HPCA
2002
IEEE
14 years 8 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
EGH
2010
Springer
13 years 5 months ago
2010
Springer
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
CF
2006
ACM
14 years 1 months ago
2006
ACM
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
SBACPAD
2008
IEEE
14 years 2 months ago
2008
IEEE
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...