Sciweavers

869 search results - page 138 / 174
» Cache Architectures for Reconfigurable Hardware
Sort
View
APCSAC
2005
IEEE
14 years 1 months ago
Targeted Data Prefetching
Abstract. Given the increasing gap between processors and memory, prefetching data into cache becomes an important strategy for preventing the processor from being starved of data....
Weng-Fai Wong
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 28 days ago
In-system FPGA prototyping of an itanium microarchitecture
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
Roland E. Wunderlich, James C. Hoe
ISCAS
2003
IEEE
69views Hardware» more  ISCAS 2003»
14 years 25 days ago
A modular sensor microsystem utilizing a universal interface circuit
The performance features of MEMS transducers allow the development of a new class of small, low-power sensor microsystems which utilize a suite of sensors to support a wide range ...
Andrew Mason, N. Yazdi, J. Zhang, Z. Sainudeen
EUROPAR
2000
Springer
13 years 11 months ago
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
We present a compiler algorithm called BitValue, which can discover both unused and constant bits in dusty-deck C programs. BitValue uses forward and backward dataflow analyses, ge...
Mihai Budiu, Majd Sakr, Kip Walker, Seth Copen Gol...
FPGA
2000
ACM
150views FPGA» more  FPGA 2000»
13 years 11 months ago
Programmable memory blocks supporting content-addressable memory
The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as ...
Frank Heile, Andrew Leaver, Kerry Veenstra