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GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
14 years 9 days ago
Utilizing custom registers in application-specific instruction set processors for register spills elimination
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
Hai Lin, Yunsi Fei
ACIIDS
2009
IEEE
144views Database» more  ACIIDS 2009»
14 years 1 months ago
Processing Exact Results for Sliding Window Joins over Time-Sequence, Streaming Data Using a Disk Archive
— We consider the problem of processing exact results for sliding window joins over data streams with limited memory. Existing approaches deal with memory limitations by shedding...
Abhirup Chakraborty, Ajit Singh
WIA
2004
Springer
14 years 1 months ago
A BDD-Like Implementation of an Automata Package
In this paper we propose a new data structure, called shared automata, for representing deterministic finite automata (DFA). Shared automata admit a strong canonical form for DFA ...
Jean-Michel Couvreur
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 1 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 1 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna