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RTAS
2006
IEEE
14 years 1 months ago
Real-Time Scheduling on Multicore Platforms
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
James H. Anderson, John M. Calandrino, UmaMaheswar...
DSD
2007
IEEE
120views Hardware» more  DSD 2007»
14 years 2 months ago
Latency Minimization for Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) are a very useful means for modeling and analyzing streaming applications. Some performance indicators, such as throughput, have been studied b...
Amir Hossein Ghamarian, Sander Stuijk, Twan Basten...
JHSN
2002
58views more  JHSN 2002»
13 years 7 months ago
Aggregation based information collection for mobile environments
: In the future, we are likely to see a tremendous rise in mobile computing and communications as ubiquitous applications incorporate multimedia information. These mobile multimedi...
Qi Han, Nalini Venkatasubramanian
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
14 years 1 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
ASAP
2008
IEEE
105views Hardware» more  ASAP 2008»
13 years 10 months ago
Fast custom instruction identification by convex subgraph enumeration
Automatic generation of custom instruction processors from high-level application descriptions enables fast design space exploration, while offering very favorable performance and...
Kubilay Atasu, Oskar Mencer, Wayne Luk, Can C. &Ou...