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GLVLSI
2003
IEEE
171views VLSI» more  GLVLSI 2003»
14 years 27 days ago
Combining wire swapping and spacing for low-power deep-submicron buses
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
Enrico Macii, Massimo Poncino, Sabino Salerno
ICIDS
2009
Springer
14 years 6 days ago
Comparing Effects of Different Cinematic Visualization Strategies on Viewer Comprehension
Abstract. Computational storytelling systems have mainly focused on the construction and evaluation of textual discourse for communicating stories. Few intelligent camera systems h...
Arnav Jhala, R. Michael Young
FPGA
2001
ACM
139views FPGA» more  FPGA 2001»
14 years 3 days ago
A memory coherence technique for online transient error recovery of FPGA configurations
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
Wei-Je Huang, Edward J. McCluskey
IEEEPACT
2000
IEEE
14 years 6 hour ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
13 years 11 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu