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CODES
2011
IEEE
12 years 7 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....
IPPS
1999
IEEE
13 years 12 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
ASPLOS
2008
ACM
13 years 9 months ago
Accelerating two-dimensional page walks for virtualized systems
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...
Ravi Bhargava, Ben Serebrin, Francesco Spadini, Sr...
RTSS
2003
IEEE
14 years 28 days ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
IPPS
2000
IEEE
14 years 2 days ago
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima