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» Caching in Web memory hierarchies
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APCSAC
2003
IEEE
14 years 24 days ago
L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory, with a TLB caching page translations for that main mem...
Philip Machanick, Zunaid Patel
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
13 years 11 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
DSD
2004
IEEE
132views Hardware» more  DSD 2004»
13 years 11 months ago
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy
Filter cache(FC) is effective in achieving energy saving at the expense of some performance degradation. The energy savings, here, comes from repeated execution of tiny loops from...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
MICRO
2010
IEEE
333views Hardware» more  MICRO 2010»
13 years 6 months ago
Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor
Pat Conway, Nathan Kalyanasundharam, Gregg Donley,...
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
14 years 23 days ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...