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IPPS
1999
IEEE
15 years 10 months ago
Hardwired-Clusters Partial-Crossbar: A Hierarchical Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
BMCBI
2007
139views more  BMCBI 2007»
15 years 6 months ago
XSTREAM: A practical algorithm for identification and architecture modeling of tandem repeats in protein sequences
Background: Biological sequence repeats arranged in tandem patterns are widespread in DNA and proteins. While many software tools have been designed to detect DNA tandem repeats (...
Aaron M. Newman, James B. Cooper
ICIP
2009
IEEE
16 years 7 months ago
Memory-less Bit-plane Coder Architecture For Jpeg2000 With Concurrent Column-stripe Coding
In implementing an efficient block coder for JPEG2000, the memories required for storing the state variables dominate the hardware cost of a block coder. In this paper, we propose...
WWW
2005
ACM
16 years 7 months ago
Web services security configuration in a service-oriented architecture
Security is one of the major concerns when developing missioncritical business applications, and this concern motivated the Web Services Security specifications. However, the exis...
Takeshi Imamura, Michiaki Tatsubori, Yuichi Nakamu...
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
16 years 6 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda