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LSSC
2005
Springer
14 years 3 months ago
Systolic Architecture for Adaptive Censoring CFAR PI Detector
A new parallel algorithm for signal processing and a parallel systolic architecture of a robust constant false alarm rate (CFAR) processor with post-detection integration and adap...
Ivan Garvanov, Christo A. Kabakchiev, Plamen Daska...
ICIP
1999
IEEE
14 years 11 months ago
An End-To-End Architecture for Mpeg-4 Video Streaming over the Internet
It is a challenging problem to design an e cient MPEG-4 video delivery system that can maximize the perceptual quality while achieving high resource utilization. This paper addres...
Yiwei Thomas Hou, Dapeng Wu, Wenwu Zhu, Hung-Ju Le...
ITCC
2005
IEEE
14 years 3 months ago
ASIC Implementation of a Unified Hardware Architecture for Non-Key Based Cryptographic Hash Primitives
Hash algorithms are a class of cryptographic primitives used for fulfilling the requirements of integrity and authentication in cryptography. In this paper, we propose and present...
T. S. Ganesh, T. S. B. Sudarshan
SMC
2007
IEEE
105views Control Systems» more  SMC 2007»
14 years 4 months ago
A software architecture for adaptive modular sensing systems
Abstract—In this paper, a software architecture and knowledge representation scheme that enables the combination and reconfiguration of modular sensor and actuator components is...
Andrew C. Lyle, Michael D. Naish
WISA
2007
Springer
14 years 4 months ago
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations
Abstract. The hash algorithm forms the basis of many popular cryptographic protocols and it is therefore important to find throughput optimal implementations. Though there have be...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede