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CN
2004
130views more  CN 2004»
13 years 8 months ago
The effect of bandwidth and buffer pricing on resource allocation and QoS
Congestion-based pricing of network resources is a common approach in evolving network architectures that support Quality of Service (QoS). Resource usage and QoS will thus fluctu...
Nan Jin, Scott Jordan
CAV
2010
Springer
282views Hardware» more  CAV 2010»
14 years 23 days ago
A NuSMV Extension for Graded-CTL Model Checking
Graded-CTL is an extension of CTL with graded quantifiers which allow to reason about either at least or all but any number of possible futures. In this paper we show an extension...
Alessandro Ferrante, Maurizio Memoli, Margherita N...
ICCAD
1998
IEEE
109views Hardware» more  ICCAD 1998»
14 years 1 months ago
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Field programmable gate arrays (FPGAs) are commonly used in embedded systems. Although it is possible to reconfigure some FPGAs while an embedded system is operational, this featu...
Robert P. Dick, Niraj K. Jha
IPPS
1998
IEEE
14 years 1 months ago
An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams
Instruction scheduling methods based on the construction of state diagrams (or automata) have been used for architectures involving deeply pipelined function units. However, the s...
Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Er...
IPPS
1998
IEEE
14 years 1 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...