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ICSE
1999
IEEE-ACM
13 years 11 months ago
Experience with Performing Architecture Tradeoff Analysis
Software architectures, like complex designs in any field, embody tradeoffs made by the designers. However, these tradeoffs are not always made explicitly by the designers and the...
Rick Kazman, Mario Barbacci, Mark Klein, S. Jeromy...
DAC
2006
ACM
13 years 9 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
DSN
2005
IEEE
13 years 9 months ago
SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors
Soft errors are a growing concern for processor reliability. Recent work has motivated architecture-level studies of soft errors since the architecture can mask many raw errors an...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
DSD
2004
IEEE
136views Hardware» more  DSD 2004»
13 years 11 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
RTAS
2003
IEEE
14 years 20 days ago
Probabilistic Worst-Case Response-Time Analysis for the Controller Area Network
This paper presents a novel approach for calculating a probabilistic worst-case response-time for messages in the Controller Area Network (CAN). CAN uses a bit-stuffing mechanism...
Thomas Nolte, Hans Hansson, Christer Norström