Both the logic and the stochastic analysis of discrete-state systems are hindered by the combinatorial growth of the state space underlying a high-level model. In this work, we con...
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
This paper considers the diagnosis of large discrete-event systems consisting of many components. The problem is to determine, online, all failures and states that explain a given...
— We consider the fundamental delay tradeoffs for minimizing energy expenditure in a multi-user wireless downlink with randomly varying channels. First, we extend the BerryGallag...