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» Can Styles Improve Architectural Pattern Reuse
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AICT
2005
IEEE
14 years 2 months ago
A Semantic Lifecycle Approach to Learning Object Repositories
Learning Object repositories play a key role in the vision of reusable learning contents and learning designs, serving as providers for learning-oriented artefacts. Nevertheless, ...
Miguel-Ángel Sicilia, Elena García B...
IPPS
2007
IEEE
14 years 3 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
CCS
2011
ACM
12 years 8 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
LCPC
2004
Springer
14 years 2 months ago
Phase-Based Miss Rate Prediction Across Program Inputs
Previous work shows the possibility of predicting the cache miss rate (CMR) for all inputs of a program. However, most optimization techniques need to know more than the miss rate ...
Xipeng Shen, Yutao Zhong, Chen Ding
SIGARCH
2008
97views more  SIGARCH 2008»
13 years 8 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...