Sciweavers

183 search results - page 20 / 37
» Canonical Big Operators
Sort
View
DAC
2009
ACM
14 years 9 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
SECON
2007
IEEE
14 years 2 months ago
A SoC-based Sensor Node: Evaluation of RETOS-enabled CC2430
—Recent progress in Wireless Sensor Networks technology has enabled many complicated real-world applications. Some of the applications demand a non-trivial amount of computation;...
Sukwon Choi, Hojung Cha, SungChil Cho
EUROGRAPHICS
2010
Eurographics
14 years 4 months ago
Practical quad mesh simplification
n this paper we present an innovative approach to incremental quad mesh simplification, i.e. the task of producing a low complexity quad mesh starting from a high complexity one. T...
Marco Tarini, Nico Pietroni, Paolo Cignoni, Daniel...
ICDAR
2003
IEEE
14 years 1 months ago
A Segmentation Method for Bibliographic References by Contextual Tagging of Fields
In this paper, a method based on part-of-speech tagging (PoS) is used for bibliographic reference structure. This method operates on a roughly structured ASCII file, produced by O...
Dominique Besagni, Abdel Belaïd, Nelly Benet
ISQED
2003
IEEE
113views Hardware» more  ISQED 2003»
14 years 1 months ago
Using Integer Equations for High Level Formal Verification Property Checking
This paper describes the use of integer equations for high level modeling digital circuits for application of formal verification properties at this level. Most formal verificatio...
Bijan Alizadeh, Mohammad Reza Kakoee