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» Case study in modeling and simulation validation methodology
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DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 8 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
RE
2008
Springer
15 years 4 months ago
Design Science, Engineering Science and Requirements Engineering
For several decades there has been a debate in the computing sciences about the relative roles of design and empirical research, and about the contribution of design and research ...
Roel Wieringa, J. M. G. Heerkens
IUI
2003
ACM
15 years 9 months ago
Evolution of user interaction: the case of agent adele
Animated pedagogical agents offer promise as a means of making computer-aided learning more engaging and effective. To achieve this, an agent must be able to interact with the lea...
W. Lewis Johnson, Erin Shaw, Andrew Marshall, Cath...
EURODAC
1995
IEEE
149views VHDL» more  EURODAC 1995»
15 years 8 months ago
Cosimulation of real-time control systems
The behaviour of a real-time system can be validated at the system level by means of a real-time operating system model in a VHDL simulation environment. The model consists of the...
Juha-Pekka Soininen, Tuomo Huttunen, Kari Tiensyrj...
ICSE
2003
IEEE-ACM
16 years 4 months ago
The Deployer's Problem: Configuring Application Servers for Performance and Reliability
Frameworks such as J2EE are designed to simplify the process of developing enterprise applications by handling much of the complexity of concurrency, transaction, and persistence ...
Mukund Raghavachari, Darrell Reimer, Robert D. Joh...