Sciweavers

324 search results - page 51 / 65
» Cell Broadband Engine processor: Design and implementation
Sort
View
ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
14 years 7 months ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
WSC
1997
14 years 5 days ago
A Virtual PNNI Network Testbed
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...
Kalyan S. Perumalla, Matthew Andrews, Sandeep N. B...
LCTRTS
2005
Springer
14 years 4 months ago
Preventing interrupt overload
Performance guarantees can be given to tasks in an embedded system by ensuring that access to each shared resource is mediated by an appropriate scheduler. However, almost all pre...
John Regehr, Usit Duongsaa
FPL
2009
Springer
161views Hardware» more  FPL 2009»
14 years 3 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
IJHPCN
2006
116views more  IJHPCN 2006»
13 years 10 months ago
Implications of application usage characteristics for collective communication offload
Abstract-- The performance of collective communication operations is known to have a significant impact on the scalability of some applications. Indeed, the global, synchronous nat...
Ron Brightwell, Sue Goudy, Arun Rodrigues, Keith D...