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» Challenges in Physical Chip Design
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ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
13 years 8 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 1 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
TC
2008
13 years 8 months ago
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic n...
Assaf Shacham, Keren Bergman, Luca P. Carloni
CHI
2004
ACM
14 years 9 months ago
Trading design spaces: exchanging ideas on physical design environments
Physical design environments are places that support people engaged in the spatial, physical, tangible act of creation. It is now possible to augment workspaces with an amazing ar...
Wendy Ju, Margot Brereton, Michael Haller, Amanda ...
VLDB
2004
ACM
143views Database» more  VLDB 2004»
14 years 2 months ago
DB2 Design Advisor: Integrated Automatic Physical Database Design
The DB2 Design Advisor in IBM® DB2® Universal Database™ (DB2 UDB) Version 8.2 for Linux®, UNIX® and Windows® is a tool that, for a given workload, automatically recommends ...
Daniel C. Zilio, Jun Rao, Sam Lightstone, Guy M. L...