658 search results - page 28 / 132 » Challenges in Physical Chip Design |
PDP
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
MSWIM
2004
ACM
14 years 2 months ago
2004
ACM
Emerging “urban” ad hoc networks resulting from a large number of individual WLAN users challenge the way users could explore and interact with their physical surroundings. Ro...
DAC
2006
ACM
14 years 2 months ago
2006
ACM
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...
GECCO
2003
Springer
14 years 1 months ago
2003
Springer
Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physica...
ICCD
2004
IEEE
14 years 5 months ago
2004
IEEE
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...