658 search results - page 40 / 132 » Challenges in Physical Chip Design |
SAS
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
RIDE
1998
IEEE
14 years 9 days ago
1998
IEEE
Based on a fifteen month investigation of a post production facilities for both the entertainment industry and broadcasters, we identified a number of challenges with the design an...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
Multi-million gate System-on-Chip (SoC) designs increasingly rely on Intellectual Property (IP) blocks. However, due to technology scaling the leakage power consumption of the IP ...
BMCBI
2006
13 years 8 months ago
2006
Background: High density oligonucleotide tiling arrays are an effective and powerful platform for conducting unbiased genome-wide studies. The ab initio probe selection method emp...
ICCAD
2000
IEEE
14 years 1 months ago
2000
IEEE
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...